Hybrid boards with ARM processors integrate FPGAs with an ARM processor, typically multicore, over a high speed bus. For such a configuration, the ARM processor is termed the hard processor system or HPS. Writing to the FPGA from the ARM processor is typically performed via C from an embedded Linux build (yocto or buildroot) running on the ARM core. VHDL is preferred for design and can be used exclusively.
|ModelSim Wave Output for the xor design|
The source code is available on github at the following link.
xorchain hardware design in VHDL
|ModelSim Full Window view with wave form output of xor simulation. ModelSim-Intel FPGA Starter Edition © Intel|