A few years ago, a friend recommended that I purchase an FGPA board without a hybrid ARM core to start with, as working with an FPGA board is already complicated. Having worked with numerous ARM processors, I decided to instead purchase an FPGA board with a multicore ARM processor. Hybrid boards such as these integrate the FPGA fabric with an ARM processor, typically multicore, over a high speed bus. For such a configuration, the ARM processor is termed the hard processor system or HPS. Writing to the FPGA from the ARM processor is typically performed via C from an embedded Linux build (yocto or buildroot) running on the ARM core.
|ModelSim Wave Output for the xor design|
The source code is available on github at the following link.
xorchain hardware design in VHDL
|ModelSim Full Window view with wave form output of xor simulation. ModelSim-Intel FPGA Starter Edition © Intel|